Sta Engineer

🚀 Hiring: STA Engineer | Bay Area, CA (Onsite)
We are looking for an experienced STA Engineer to join our team in the Bay Area!
🔹 Key Responsibilities:
• Develop block & SoC timing constraints and drive full-chip STA signoff (multi-corner, multi-voltage)
• Own timing flow: budgeting, constraints/exceptions, and convergence
• Collaborate with design & physical implementation teams to meet QoR and resolve timing issues
• Work with tools like Tempus and PrimeTime for STA analysis
🔹 Preferred Experience:
• 10+ years in ASIC implementation / CAD methodology
• Strong expertise in STA constraints, timing convergence & ECOs
• Experience with multi-voltage and low-power designs
• Hands-on with Synopsys tools (DC, PrimeTime)
• Excellent problem-solving and attention to detail
📍 Location: Bay Area, CA (Onsite)